Dr. Zhiru Zhang is a Professor in the School of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. His current research investigates new algorithms, methodologies, and design automation tools for heterogeneous computing systems. Recent publications from his group focus on the topics of high-level synthesis (HLS), hardware specialization for machine learning, and programming models for software-defined FPGAs.
Prior to joining Cornell, he earned his Ph.D. in Computer Science from UCLA and co-founded AutoESL based on his dissertation research on HLS. AutoESL was acquired by Xilinx (now AMD), and its HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators. He also holds a B.S. in Computer Science from Peking University and an M.S. in Computer Science from UCLA.Jordan Dotzel
MS/PhD , co-advised by Prof. Mohamed AbdelfattahJordan is a PhD student at the CSL, who completed his B.A. in Computer Science at Cornell in 2017. He spent a year as a software engineer in Boston building third-party integrations before returning to Cornell. His recent research focuses on efficient machine learning architectures and data-free quantization techniques. Currently, he explores algorithm-hardware co-design and efficient object detection models.
Jie is a PhD student in Computer Systems Laboratory (CSL) at Cornell University under the supervision of Prof. Zhiru Zhang. She received her bachelor's degree in Microelectronic Science and Engineering from Tsinghua University. Her research interests lie generally in the field of computer architecture and electronic design automation, including but not limited to domain-specific computing, machine learning and reconfigurable architectures.
Yixiao is an MS/PhD student in Electrical and Computer Engineering, working in Computer Systems Lab under supervision of Prof. Zhiru Zhang. He received his bachelor's degree at University of Electronic Science and Technology of China. His current research focuses on acceleration of sparse applications on FPGAs. Yixiao is also interested in high-level synthesis and design automation.
Zichao is currently a MS/PhD student at the School of Electrical and Computer Engineering at Cornell University, under supervision of Professor Zhiru Zhang. He received his bachelor's degree in Electrical Engineering from Tsinghua University. Before joining Cornell, he had worked in industry for years as a logic design engineer in several FPGA and ASIC design projects. His research interests lie in the field of computer architecture, especially heterogeneous accelerator design, process in memory and machine learning.
Yaohui is a Ph.D. student at Cornell University, advised by Zhiru Zhang, starting from Spring 2021. He received his BS degree in from Peking University. Currently, his research interests mainly focus on improving the efficiency of machine learning models.
Niansong Zhang is currently an M.S. student in the Computer System Lab, advised by Professor Zhiru Zhang. He received his B.E. from Sun Yat-sen University in 2020. His research interests include heterogeneous compilation, domain-specific language for hardware design, and FPGA placement and routing.
Jiajie is a Ph.D. student in Computer Systems Laboratory (CSL) at Cornell University under the supervision of Prof. Zhiru Zhang. He received his bachelor's degree in Electronic Engineering from Tsinghua University. Currently, his research interests lie within systems and hardware optimization for machine learning tasks with the main focus on graph learning applications.
Andrew is a Ph.D. student in the Computer Systems Lab at Cornell, advised by Professor Zhiru Zhang. He received his B.S. in Computer Engineering from the University of Pennsylvania in Spring 2021. His current research interests are in high-level synthesis and FPGA place-and-route tools.
Hongzheng is a Ph.D. student in Computer Science at Cornell University, supervised by Prof. Zhiru Zhang. He received his B.E. degree from the School of Computer Science and Engineering, Sun Yat-sen University in 2021. His research interests include heterogeneous computing, domain-specific compilers, and computer systems for big data and machine learning.
Matthew is a Ph.D. student in the Computer Systems Laboratory at Cornell, advised by Prof. Zhiru Zhang. He received a B.S. in Computer Engineering and a B.A. in Mathematics from the University of Pennsylvania in Spring 2022. His research interests are centered around design automation for FPGAs. This includes high-level synthesis, reconfigurable overlays, FPGA virtualization, as well as other aspects of FPGA CAD flows.
Zhanqiu is a PhD student in the Computer Systems Laboratory at Cornell University. She received her B.S. in Computer Science and Electrical and Computer Engineering in 2023. Her research interests lie generally in the field of computer systems and computer architecture. Currently, she is working on end-to-end recommendation systems.
Vesal is a Ph.D. student in the Computer Systems Laboratory at Cornell University.
Grace is a PostDoc in the Computer Systems Laboratory at Cornell University.
Chenhui Deng
PhDDingyi Dai
MSZhongyuan Zhao
PostDocEcenur Ustun
PhDDebjit Pal
PostDocGai Liu
PhDQiang You
Visiting PhD, Tsinghua Univ.Chang Xu
Visiting PhD, Peking Univ.Mingxing Tan
PostDoc