Professor Zhiru Zhang delivered an invited talk on Mapping-aware Logic Synthesis with Parallelized Stochastic Optimization at EPFL Workshop on Logic Synthesis and Emerging Technologies held at EPFL on 28-29 September … Continue reading
Professor Zhiru Zhang delivered a three-hour invited lecture on Accelerating Deep Neural Networks on FPGAs at Deep Learning on Chip summer school held at Politecnico di Torino, Torino, Italy in … Continue reading
Our research on Celerity SoC, which is funded under the DARPA CRAFT program and is in collaboration with Batten Research Group and teams from UCSD, UMich, UCLA, was presented at … Continue reading
Members of the Zhang Research Group and Cornell CSL attended and presented six papers at the 25th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’17) in Monterey, CA. Our presentations … Continue reading
Our ongoing research on “A Synthesis Methodology for Accelerator-Centric SOCs and Tool Flows” is featured in the Cornell research website. This project is funded under the DARPA CRAFT program, and … Continue reading
Professor Zhiru Zhang presented Productive High-Level Programming for Deep Learning Acceleration on FPGAs at the inaugural Machine Learning on FPGAs Summit, held on 20th October 2016. This event is hosted by Programmable … Continue reading
We would like to welcome new Ph.D students, Ecenur Ustun and Sean Lai, to our research group.
We are excited to welcome Zhenghong (John) Jiang, our new postdoctoral scholar, to the group. John graduated with a Ph.D in Electrical Engineering from the University of Chinese Academy of Sciences.